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Changelog

In the following you will find actual software version information of the AnaGate tools  and AnaGate firmware releases.

Firmware AnaGate Universal Programmer 2.0 (Model UP2)

Revision History (Firmware AnaGate Programmer UP 2.0)
Revision History
Revision 2.0.916.01.2019THa

  • Bugfix FPGA: Wishobe3ParallelBus interface changed to a synchroneous design (Fix for "Unknown Error 33 " in SPI-Programmer).

Revision 2.0.811.06.2015JGo

  • new FPGA.bit: clock mode 3 inverted MOSI instead of Clock line

Revision 2.0.713.04.2015JGo

  • Bugfix (temp): set minimal SPI baudrate to 330000

Revision 2.0.617.12.2014JGo

  • Bugfix: configure and set DIOs only once at startup instead of every time a connection is opened

  • Bugfix: GetGlobals set polarity to on

Revision 2.0.505.08.2013JGo

  • program FPGA just once on start-up instead of every time a connection is established (saves about 1 second per connection)

Revision 2.0.412.02.2013JGo

  • enabled compiler optimisations

  • switched from CommonLib to libAnaGate und libAnaGateExt

  • I2C: detect and process Arbitration Lost

  • SPI: added more performant asymmetric Transceive implementation

  • SPI: added Sequence command

Revision 2.0.002.02.2013JGo

  • Initial version, based on Firmware AnaGate UP 1.3.3